Sunday, September 1, 2002

Modeling Switching Activity Using Cascaded Bayesian Networks for Correlated Input Streams

S. Bhanja and N. Ranganathan,” Modeling Switching Activity Using Cascaded Bayesian Networks for Correlated Input Streams ”, International Conference on Computer Design, pp.388-390, 2002.

@INPROCEEDINGS{1106799,
title={Modeling switching activity using cascaded Bayesian networks for correlated input streams},
author={Bhanja, S. and Ranganathan, N.},
booktitle={Computer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on},
year={2002},
month={},
volume={},
number={},
pages={ 388-390},
abstract={ We represent switching activity in VLSI circuits using a graphical probabilistic model based on cascaded Bayesian networks (CBNs). We develop an elegant method for maintaining probabilistic consistency in the interfacing boundaries across the CBNs during the inference process using a tree-dependent (TD) probability distribution function. A tree-dependent (TD) distribution is an approximation of the true joint probability function over the switching variables, with the constraint that the underlying Bayesian network representation is a tree. The tree approximation of the true joint probability function can be arrived at using a maximum weight spanning tree (MWST) built using pairwise mutual information between switchings at two signal lines. Further we also develop a TD distribution based method to model correlations among the primary inputs which is critical for accuracy in Bayesian modeling of switching activity. Experimental results for ISCAS circuits are presented to illustrate the efficacy of the proposed methods.},
keywords={ VLSI, belief networks, combinational circuits, integrated circuit modelling, probability, trees (mathematics) Bayesian modeling, ISCAS circuits, VLSI circuits, cascaded Bayesian networks, combinational circuits, correlated input streams, graphical probabilistic model, inference process, interfacing boundaries, maximum weight spanning tree, pairwise mutual information, primary inputs, probabilistic consistency, signal lines, switching activity modeling, switching variables, tree approximation, tree-dependent probability distribution function, true joint probability function},
doi={10.1109/ICCD.2002.1106799},
ISSN={1063-6404 }, }

Switching Activity Estimation of Large Circuits using Multiple Bayesian Networks

S. Bhanja and N. Ranganathan, “Switching Activity Estimationof of Large Circuits using Multiple Bayesian Networks”, 15 th Intl. Conference of VLSI Design & 7th ASP-Design and Automation Conference, pp 187-192, 2002.

@INPROCEEDINGS{994917,
title={Switching activity estimation of large circuits using multiple Bayesian networks},
author={Bhanja, S. and Ranganathan, N.},
booktitle={Design Automation Conference, 2002. Proceedings of ASP-DAC 2002. 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings.},
year={2002},
month={},
volume={},
number={},
pages={187-192},
abstract={Switching activity estimation is a crucial step in estimating dynamic power consumption in CMOS circuits. In this work, we propose a new strategy for efficient segmentation of large circuits so that they can be mapped to Multiple Bayesian Networks (MBN). The goal here is to achieve higher accuracy while reducing the memory requirements during the computation. In order to capture the correlations among the boundaries of segments, a tree dependent (TD) distribution is proposed between the segment boundaries such that the TD distribution is closest to the actual distribution of switching variable with some distance criterion. We use a Maximum Weight Spanning Tree (MWST) based approximation using mutual information between two variables at the boundary as the weight of the edge between the variables. Experimental results for ISCAS'85 circuits show that the proposed method improves accuracy significantly over other methods},
keywords={CMOS digital integrated circuits, belief networks, combinational switching, directed graphs, integrated circuit design, integrated circuit modelling, trees (mathematics)ISCAS'85 circuits, LIDAG structure, combinational circuit, directed acyclic graph, dynamic power consumption, large CMOS circuits, large circuit segmentation, maximum weight spanning tree based approximation, memory requirements, multiple Bayesian networks, switching activity estimation, switching probability model, switching variable distribution, tree-dependent distribution},
doi={10.1109/ASPDAC.2002.994917},
ISSN={}, }