JAYITA DAS,
SYED M. ALAM, and
SANJUKTA BHANJA,
SPIN
04, 1450004 (
2014) [23 pages]
DOI: 10.1142/S2010324714500040
Abstract: With the growing concerns of standby power in sub-100-nm CMOS
technologies, alternative computing techniques and memory technologies
are explored. Spin transfer torque magnetoresistive RAM (STT-MRAM) is
one such nonvolatile memory relying on magnetic tunnel junctions (MTJs)
to store information. It uses spin transfer torque to write information
and magnetoresistance to read information. In 2012, Everspin
Technologies, Inc. commercialized the first 64Mbit Spin Torque MRAM. On
the computing end, nanomagnetic logic (NML) is a promising technique
with zero leakage and high data retention. In 2000, Cowburn and Welland
first demonstrated its potential in logic and information propagation
through magnetostatic interaction in a chain of single domain circular
nanomagnetic dots of Supermalloy (
Ni80Fe14Mo5X1, X is other metals). In 2006, Imre
et al. demonstrated wires and majority gates followed by coplanar cross wire systems demonstration in 2010 by Pulecio
et al.
Since 2004 researchers have also investigated the potential of MTJs in
logic. More recently with dipolar coupling between MTJs demonstrated in
2012, logic-in-memory architecture with STT-MRAM have been investigated.
The architecture borrows the computing concept from NML and read and
write style from MRAM. The architecture can switch its operation between
logic and memory modes with clock as classifier. Further through logic
partitioning between MTJ and CMOS plane, a significant performance boost
has been observed in basic computing blocks within the architecture. In
this work, we have explored the developments in NML, in MTJs and more
recent developments in hybrid MTJ/CMOS logic-in-memory architecture and
its unique logic partitioning capability.