Roxy, Kawsher, Sébastien Ollivier, Arifa Hoque, Stephen Longofono, Alex K. Jones, and Sanjukta Bhanja. "A novel transverse read technique for domain-wall “racetrack” memories." IEEE Transactions on Nanotechnology 19 (2020): 648-652.
Citation in bibtex
@ARTICLE{9158538,
  author={Roxy, Kawsher and Ollivier, Sébastien and Hoque, Arifa and Longofono, Stephen and Jones, Alex K. and Bhanja, Sanjukta},
  journal={IEEE Transactions on Nanotechnology}, 
  title={A Novel Transverse Read Technique for Domain-Wall “Racetrack” Memories}, 
  year={2020},
  volume={19},
  number={},
  pages={648-652},
  doi={10.1109/TNANO.2020.3014091}}Abstract:
Domain-wall
 memory (DWM), an extension to spin transfer torque-magnetic random 
access memory (STT-MRAM), stores multiple bits, each bit in an 
individual domain within a nanowire. The access mechanism of a DWM is 
carried out with the help of an access point orthogonal to the nanowire,
 similar to a conventional magneto-tunnel junction (MTJ) of STT-MRAM. In
 this context, the MTJ free layer is one of the domains of the nanowire.
 Prior to an access, the desired bit is brought under the access point 
by shifting, and then its spin orientation is detected by a traditional 
sensing circuit or overwritten with a write current. However, the 
nanowire can also be viewed as a multi-level cell (MLC)-like device when
 tested with an end-to-end current. Based on this observation, we 
devised a novel transverse read (TR) technique to detect the number of 
`1's stored in a DWM without shifting any domains. TR is non-destructive
 and requires ultra-low power insomuch as the TR current is small 
compared to the shifting current. The TR has interesting applications in
 DWM such as a neuron in a neuromorphic engine, a multi-bit digital 
storage device, or as a fault tolerance tool for shifting reliability in
 DWM memories. In this work, we experimentally demonstrate the 
feasibility of TR in both perpendicular and in-plane magnetic anisotropy
 nanowires and determine the critical requirements of successful TR 
operation.