Ollivier, S., Longofono, S., Dutta, P., Hu, J., Bhanja, S., & Jones, A. K. (2022). Toward comprehensive shifting fault tolerance for domain-wall memories with piett. IEEE Transactions on Computers, 72(4), 1095-1109.
Abstract:
Spintronic
domain-wall memories (DWMs) offer improved memory density and energy
compared to conventional memories, but are susceptible to shifting
faults. We propose PIETT (
P
inning,
I
nsertion,
E
rasure, and
T
ranslation-fault
T
olerance) for improved misalignment correction versus the state of the
art. PIETT proposes a derived error correction combined with
multi-domain access approach to detect and correct a minimum of three
misalignment faults after an arbitrary shift distance. Moreover, the
rate of both misalignment and pinning faults are characterized in DWM
nanowires, demonstrating that pinning faults are a significant concern
to DWM. As such, PIETT is the first method to combine correction of
misalignment and pinning faults in random access DWMs. It also
introduces novel PIETT Transverse Access Points (TAPs), which utilize a
novel write access mode that can set/reset multiple domains in a single
intrinsic operation and can store shift distance detection codes. By
allowing checks between shifts of the intrinsic shift distance (e.g., 3
domains), using a single TAP per nanowire expands misalignment
protection and determines the needed corrective shifts to correct faults
in all nanowires. Two TAPs expands misalignment protection to correct
misalignment by more than one position and detects pinning by detecting
different shift distances at each extremity of the nanowire. PIETT
leverages knowledge of pinned nanowire locations to guide a modified
SECDED ECC with one additional parity bit stored in additional parity
nanowires. Thus, PIETT in TAP mode can correct unlimited, potentially
multi-position, misalignment faults and either up to three pinning
faults or up to two pinning faults with up to one bit flip fault using
scrubbing. PIETT provides 8 to 21 orders of magnitude improvement in
mean-time-to-failure with similar or better area overhead and only a 1%
system performance degradation compared to state of the art DWM
misalignment correction.
