Magnetic Cellular Automata (MCA) arrays under spatially varying field Kumari, A. Bhanja, S. |
![]() |
![]() |
![]() |
Abstract Magnetic Cellular Automata (MCA) is a variant of Quantum-dot-cellular automata (QCA) where neighboring single-domain nano-magnets (also termed as magnetic cell) process and propagate information (logic 1 or logic 0) through mutual interaction. The attractive nature of this framework is that not only room temperature operations are feasible but also interaction between neighbors is central to information processing as opposed to creating interference. In this work, we explore spatially moving Landauer clocking scheme for MCA arrays (length of eight, sixteen and thirty-two cells) and show the role and effectiveness of the clock in propagating logic signal from input to output without magnetic frustration. Simulation performed in OOMMF. |
Tuesday, June 16, 2009
Magnetic Cellular Automata (MCA) arrays under spatially varying field
Magnetic Cellular Automata wires
Pulecio, J.F. Bhanja, S.
Dept. of Electr. Eng., Univ. of South Florida, Tampa, FL, USA
This paper appears in: Nanotechnology Materials and Devices Conference, 2009. NMDC '09. IEEE
Publication Date: 2-5 June 2009
On page(s): 73 - 75
Location: Traverse City, MI
ISBN: 978-1-4244-4695-7
Digital Object Identifier: 10.1109/NMDC.2009.5167576
Current Version Published: 2009-07-21
Abstract
Magnetic Cellular Automata (MCA) is a novel take on an alternative technological actualization of Boolean logic machines. Not only has it been able to prototypically demonstrate successful operation of logical gates at room temperature; all key components necessary to implement any Boolean function has been realized. We present work further reducing the size of the single domain nano-magnet, approximately 100 times 50 times 30 nm, and physically implement two types of MCA wire architectures ferromagnetic and anti-ferromagnetic. We report the first physical implementation of shape engineered ferromagnetic wires and compare both wires under saturating magnetic fields in the Z direction. We have concluded experimentally, that for conventional data propagation between logical networks, ferromagnetic wires provide extremely stable operation. The high order of coupling we found under saturating magnetic fields demonstrates the flexible clocking nature of ferromagnetic wires and inches the technology closer to implementing complex circuitry.
Invited Paper in IEEE NMDC, 2009
Saturday, May 16, 2009
Dr. Bhanja is selected as Program Co-Chair, IEEE ISVLSI, 2009
Monday, March 16, 2009
Defect characterization in magnetic field coupled arrays
Defect characterization in magnetic field coupled arrays Kumari, A. Pulecio, J.F. Bhanja, S. |
![]() |
![]() |
![]() |
Abstract Magnetic Cellular Automata (MCA) utilizes mutual exchange energies of neighboring magnetic cells to order the single-domain magnetic cell which in turn performs computational tasks. In this paper, we study three dominant type of geometric defects (missing, spacing, merging) in array (used as interconnects) based on our fabrication experiments. We study effect of these defects in three segments of the array (near-input, center and near-output) and we have observed that location of these defects play an important role in masking of the errors. The observed simulation results indicate that most of the defects occurring around center and near-output would be masked generating correct behavior while defects in the near-input segment would mostly cause erroneous output. We also observe that MCA is extremely robust towards space irregularities, one of the most common form of defect we observed through our fabrication techniques. |
Friday, January 16, 2009
An Error Model to Study the Behavior of Transient Errors in Sequential Circuits
An Error Model to Study the Behavior of Transient Errors in Sequential Circuits Lingasubramanian, K. Bhanja, S. |
![]() |
![]() |
![]() |
Abstract In sequential logic circuits the transient errors that occur in a particular time frame will propagate to consecutive time frames thereby making the device more vulnerable. In this work we propose a probabilistic error model for sequential logic that can measure the expected output error probability, given a probabilistic input space, that account for both spatial dependencies and temporal correlations across the logic, using a time evolving causal network. We demonstrate our error model using MCNC and ISCAS benchmark circuits and validate it with HSpice simulations. Our observations show that, significantly low individual gate error probabilities produce at least 5 fold higher output error probabilities. The average error percentage of our results with reference to HSpice simulation results is only 4.43%. Our observations show that the order of temporal dependency of error varies for different sequential circuits. |