Wednesday, June 15, 2011

Low Power CMOS-Magnetic Nano-Logic With Increased Bit Controllability (IEEE Nano 2011)

J. Das, S. M. Alam, and S. Bhanja, “Low Power CMOS-Magnetic Nano-Logic With Increased Bit Controllability”, to IEEE Conference on Nanotechnology, 2011

Experimental Demonstration of Viability of Energy Minimizing Computing using Nano-magnets (IEEE Nano 2011)

J. Pulecio, S. Sarkar and S. Bhanja, “Experimental Demonstration of Viability of Energy Minimizing Computing using Nano-magnets”, to IEEE Conference on Nanotechnology, 2011

Novel knowledge module on fusion of logic and memory to undergraduate students (IEEE MSE)

D. Karunaratne, S. Rajaram, P. De, K. Kusmierek and S. Bhanja, “Novel knowledge module on fusion of logic and memory to undergraduate students”, to IEEE Microelectronic System Education Conference, 2011.

Tool for Analysis and Quantification of Fabrication Layouts in Nanomagnet-based Computing (IEEE NANO 2011)

R. Panchumarthy, D. Karunaratne, S. Sarkar and S. Bhanja, “Tool for Analysis and Quantification of Fabrication Layouts in Nanomagnet-based Computing”, to IEEE Conference on Nanotechnology, 2011.

A Review of Magnetic Cellular Automata Systems (Invited to IEEE ISCAS), 2011

S. Bhanja and J. Pulecio, “A Review of Magnetic Cellular Automata Systems”, (Invited paper) to IEEE International Symposium on Circuits and Systems (ISCAS), 2011.

QCAPro - An Error-Power Estimation Tool for QCA Circuit Design (Invited paper to IEEE ISCAS), 2011

S. Srivastava, A. Asthana, S. Bhanja and S. Sarkar “QCAPro - An Error-Power Estimation Tool for QCA Circuit Design”, (Invited paper) to IEEE International Symposium on Circuits and Systems (ISCAS), 2011. Download the tool

Javier Pulecio recives USF Hispanic Pathway Award, 2010