Prof. Mary Jane Irwin's visit

We hosted Distinguished Lecture Series, sponsored by Computer Research Association's Committee on the Status of Women in Computing Research (CRA-W), Fall 2007.

Prof. Porod's Visit

Prof. Wolfgang Porod visits our fabrication lab.

Mcnight scholarship

Javier Pulecio receives McKnight Foundation Scholarship

Invited Talk sponsored by IEEE@WIE

Dr. Sanjukta Bhanja delivers Invited talk on "Field-Coupled Nano-Computing" for National Symposium on Emerging Computing, IEEE WIE, Kolkata, 2007.

DASS Award

Karthikeyan Lingasubramanian attends Design Automation Summer School 2007.

NSF CAREER Award

Dr. Bhanja receives NSF CAREER award 2007.

Test, Defect Tolerance and Reliability for Emerging Nanotechnologies

S. Bhanja, M. Ottavi, S. Pontarelli and F. Lombardi, “QCA Circuits for Robust Coplanar Crossing”, in “Test, Defect Tolerance and Reliability for Emerging Nanotechnologies”, edited by Mohammad Tehranipoor, Springer Science +Business Media, LLC.

Tau Beta Pi Outstanding Research Faculty award

Dr. Bhanja receives 2007 Tau Beta Pi Outstanding Engineering Faculty Researcher award

NCRG members receive Provost's nomination of outstanding teaching assistants

Saket Srivastava and Karthikeyan Lingasubramanian receives nomination for Provost's Oustanding Teaching Assistant award, 2007

Probabilistic error modeling for sequential logic

@INPROCEEDINGS{4601266,
title={Probabilistic error modeling for sequential logic},
author={Lingasubramanian, K. and Bhanja, S.},
booktitle={Nanotechnology, 2007. IEEE-NANO 2007. 7th IEEE Conference on},
year={2007},
month={Aug.},
volume={},
number={},
pages={616-620},
abstract={Reliability is a crucial issue in nanoscale devices including both CMOS (beyond 22 nm) and non-CMOS. Devices in this regime tend to be more prone to errors due to thermal effects creating uncertainty in device characteristics. The transient nature of these errors commands the need for a probabilistic model that can represent the inherent circuit logic and can measure the errors. In sequential logic the error occurred in a particular time frame will be propagated to consecutive time frames thereby making the device more volatile. Any model that can represent a sequential logic should handle both spatial dependencies between nodes in a single time slice and temporal dependencies between nodes of different time slices. While modeling error in sequential logic the complexity arises in handling the temporal dependencies due to the feedback. Essentially, the feedback makes the system non-causal where outputs depend not only on inputs but also its own previous values. Depending on the circuit structure and the nature of feedback, various circuits would offer different degree of temporal dependence. In this work we propose a probabilistic error model for sequential logic that can measure the average output error probability that account for the spatio-temporal nature of the inherent dependencies using an temporally evolving causal Bayesian Networks also called Dynamic Bayesian Networks.},
keywords={CMOS logic circuits, belief networks, integrated circuit reliability, nanotechnology, probability, sequential circuits, thermal stabilityCMOS integrated circuit, average output error probability, dynamic Bayesian networks, inherent circuit logic, nanoscale devices, probabilistic error modeling, reliability, sequential logic, thermal effects},
doi={10.1109/NANO.2007.4601266},
ISSN={}, }

Reliability of Bi-stable Single Domain Nano Magnets for Cellular Automata

J. Pulecio and S. Bhanja, “Reliability of Bi-stable Single Domain Nano Magnets for Cellular Automata”, Accepted for publication in IEEE conference on nanotechnology, Hong Kong, 2007. (Note: Accepted Extended Summaries will be published in the IEEE Review of Advances on Micro, Nano, and Molecular Systems)

@INPROCEEDINGS{4601302,
title={Reliability of bi-stable single domain nano magnets for Cellular Automata},
author={Pulecio, J.F. and Bhanja, S.},
booktitle={Nanotechnology, 2007. IEEE-NANO 2007. 7th IEEE Conference on},
year={2007},
month={Aug.},
volume={},
number={},
pages={782-786},
abstract={Quantum cellular automata, also known as QCA, has been touted as a pragmatic use of quantum phenomena which currently are detrimental in nano-transistor technology. Recently, QCA technologies has expanded into magnetism, an area referred to as magnetic QCA, by exploiting the magnetic coupling interaction between neighboring cells (nano-magnets). The interactions of orderly fabricated nano-magnets and the viability of nano-magnetic structures as logical building blocks has yet to be explored in great detail. We have fabricated nano-scale magnetic QCA cells and currently the scope entails determining how factors such as material, size, placement, and surface roughness affect the magnetic properties and coupling interactions between the nano- magnetic QCA cells.},
keywords={cellular automata, logic devices, magnetic devices, nanostructured materials, nanotechnology, reliability, surface roughnessbi-stable single domain nanomagnets, nanomagnetic QCA cells, nanomagnetic structures, nanotransistor technology, quantum cellular automata, surface roughness},
doi={10.1109/NANO.2007.4601302},
ISSN={}, }

Probabilistic Maximum Error Modeling for Unreliable Logic Circuits

K. Lingasubramanian and S.Bhanja, “Probabilistic Maximum Error Modeling for Unreliable Logic Circuits”, Accepted for publication in ACM Great Lake Symposium on VLSI, 2007.

@conference{lingasubramanian2007probabilistic,
title={{Probabilistic maximum error modeling for unreliable logic circuits}},
author={Lingasubramanian, K. and Bhanja, S.},
booktitle={Proceedings of the 17th ACM Great Lakes symposium on VLSI},
pages={223--226},
year={2007},
organization={ACM New York, NY, USA}
}