Cascaded Bayesian Inferencing for Switching Activity Estimation with Correlated Inputs

S. Bhanja and N. Ranganathan, “Cascaded Bayesian Inferencing for Switching Activity Estimation with Correlated Inputs,” IEEE Transaction on VLSI Systems, Volume 12, Issue 12, pp .1360 – 1370, 2004.


@ARTICLE{1407954,
title={Cascaded Bayesian inferencing for switching activity estimation with correlated inputs},
author={Bhanja, S. and Ranganathan, N.},
journal={Very Large Scale Integration (VLSI) Systems, IEEE Transactions on},
year={2004},
month={Dec},
volume={12},
number={12},
pages={ 1360-1370},
abstract={ In this paper, we investigate the estimation of switching activity in VLSI circuits using a graphical probabilistic model based on cascaded Bayesian networks (CBNs). First, we develop a theoretical analysis for Bayesian inferencing of switching activity and then derive upper bounds for certain circuit parameters which, in turn, are useful in establishing the cascade structure of the CBN model. We formulate an elegant framework for maintaining probabilistic consistency in the interfacing boundaries across the CBNs during the inference process using a tree-dependent (TD) probability distribution function. A TD distribution is an approximation of the true joint probability function over the switching variables, with the constraint that the underlying BN representation is a tree. The tree approximation of the true joint probability function can be arrived at by using a maximum weight spanning tree (MWST) built using pairwise mutual information about the switching occurring at pairs of signal lines on the boundary. Further, we show that the proposed TD distribution function can be used to model correlations among the primary inputs which is critical for accuracy in modeling of switching activity. Experimental results for ISCAS circuits are presented to illustrate the efficacy of the proposed CBN models.},
keywords={ Bayes methods, VLSI, approximation theory, belief networks, boundary-value problems, cascade networks, circuit complexity, circuit switching, electronic engineering computing, estimation theory, inference mechanisms, statistical analysis, statistical distributions, trees (mathematics) ISCAS circuits, VLSI circuits, cascaded Bayesian inference methods, cascaded Bayesian networks, circuit complexity, circuit parameters, correlation inputs, graphical probabilistic model, maximum weight spanning tree, pairwise mutual information, probability distribution function, switching activity estimation, switching activity modeling, switching variables, tree approximation, tree dependent distribution, true joint probability function, upper bounds},
doi={10.1109/TVLSI.2004.837991},
ISSN={1063-8210}, }