Tuesday, May 29, 2012

Book Chapter: Test, Defect Tolerance and Reliability for Emerging Nanotechnologies

S. Bhanja, M. Ottavi, S. Pontarelli and F. Lombardi, “QCA Circuits for Robust Coplanar
Crossing”, in “Test, Defect Tolerance and Reliability for Emerging Nanotechnologies”, edited
by Mohammad Tehranipoor, Springer Science +Business Media, LLC, 2008.

Effectiveness of Knowledge Module on “Intel 45 nm Transistor and High-k Dielectric” into Undergraduate Semiconductor Devices Course (IEEE IEDEC 2012)

C. Siyambalapitiya, R. Hyde, K. Kusmierek and S.Bhanja, “Effectiveness of Knowledge
Module on “Intel 45 nm Transistor and High-k Dielectric” into Undergraduate Semiconductor
Devices Course”, Accepted for IEEE 2nd Interdisciplinary Engineering Design Education Conference
(IEDEC), 2011.

Non-Destructive Variability Tolerant Differential Read for Non-Volatile Logic (IEEE MWSCAS, 2012)

J. Das, S. M. Alam and S. Bhanja, “Non-Destructive Variability Tolerant Differential Read for
Non-Volatile Logic”, Accepted for IEEE 55th Int'l Midwest Symposium on Circuits & Systems,
2012.

Evaluation of Circuit Styles and VLSI Logic Designs of Pentacene OTFTs (IEEE MWSCAS, 2012)

S. Mishra and S. Bhanja, “Evaluation of Circuit Styles and VLSI Logic Designs of Pentacene
OTFTs”, Accepted for IEEE 55th Int'l Midwest Symposium on Circuits & Systems, 2012.

Addressing The Layout Constraint Problem in Cascading Logic Gates in Nanomagnetic Logic (IEEE Nano 2012)

J. Das, S. M. Alam and S. Bhanja, “Addressing The Layout Constraint Problem in Cascading
Logic Gates in Nanomagnetic Logic”, Accepted for IEEE Conference on Nanotechnology, 2012

A Novel Design Concept for High Density Hybrid CMOSNanomagnetic Circuits (IEEE Nano 2012)

J. Das, S. M. Alam and S. Bhanja, “A Novel Design Concept for High Density Hybrid CMOSNanomagnetic
Circuits”, Accepted for IEEE Conference on Nanotechnology, 2012

Study of Multilayer Spintronic Devices for Logic Computation (Intermag 2012)

S. Rajaram, D. Karunaratne and S. Bhanja, “Study of Multilayer Spintronic Devices for Logic
Computation”, IEEE INTERMAG, 2012.