Sanjukta Bhanja, "Disciplines
Without Border: Experiential Perspective" Invited Talk, @ NC-LSAMP conference NC A&T, September 2012.
Wednesday, September 26, 2012
Dr. Bhanja Invited to NSF CAREER Award Mentoring workshop, May 2012
Dr. Bhanja delivers invited talk in NSF CISE CAREER mentoring workshop, Arizona State University, May 2012.
Tuesday, May 29, 2012
Book Chapter:Nanoelectronic Device Applications Handbook
J. Pulecio, S. Sarkar and S. Bhanja, “An Experimental Demonstration of the Viability of Energy
Minimizing Computing using Nano-magnets” in “Nanoelectronic Device Applications
Handbook”, edited by James Morris & Krzysztof Iniewski, CRC Press (Taylor & Francis Group),
2012.
Minimizing Computing using Nano-magnets” in “Nanoelectronic Device Applications
Handbook”, edited by James Morris & Krzysztof Iniewski, CRC Press (Taylor & Francis Group),
2012.
Book Chapter:Nanoelectronic Device Applications Handbook
J. Das, S. M. Alam and S. Bhanja, “Non-volatile Logic-in-Memory Architecture: An Integration
between Nanomagnetic Logic and Magneto-resistive RAM” in “Nanoelectronic Device
Applications Handbook”, edited by James Morris & Krzysztof Iniewski, CRC Press (Taylor &
Francis Group), 2012.
between Nanomagnetic Logic and Magneto-resistive RAM” in “Nanoelectronic Device
Applications Handbook”, edited by James Morris & Krzysztof Iniewski, CRC Press (Taylor &
Francis Group), 2012.
Book Chapter: Test, Defect Tolerance and Reliability for Emerging Nanotechnologies
S. Bhanja, M. Ottavi, S. Pontarelli and F. Lombardi, “QCA Circuits for Robust Coplanar
Crossing”, in “Test, Defect Tolerance and Reliability for Emerging Nanotechnologies”, edited
by Mohammad Tehranipoor, Springer Science +Business Media, LLC, 2008.
Crossing”, in “Test, Defect Tolerance and Reliability for Emerging Nanotechnologies”, edited
by Mohammad Tehranipoor, Springer Science +Business Media, LLC, 2008.
Effectiveness of Knowledge Module on “Intel 45 nm Transistor and High-k Dielectric” into Undergraduate Semiconductor Devices Course (IEEE IEDEC 2012)
C. Siyambalapitiya, R. Hyde, K. Kusmierek and S.Bhanja, “Effectiveness of Knowledge
Module on “Intel 45 nm Transistor and High-k Dielectric” into Undergraduate Semiconductor
Devices Course”, Accepted for IEEE 2nd Interdisciplinary Engineering Design Education Conference
(IEDEC), 2011.
Module on “Intel 45 nm Transistor and High-k Dielectric” into Undergraduate Semiconductor
Devices Course”, Accepted for IEEE 2nd Interdisciplinary Engineering Design Education Conference
(IEDEC), 2011.
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