1. J. Das, S. M. Alam and S. Bhanja, “STT-based Non-Volatile
Logic-in-Memory Framework” in Field-Coupled Nanocomputing, edited by S. Bhanja
and N. Anderson, LNCS Series (Springer).
2. J. Pulecio, S. Sarkar and S. Bhanja, “An Experimental
Demonstration of the Viability of Energy Minimizing Computing using
Nano-magnets” in “Nanoelectronic Device Applications Handbook”, edited by James
Morris & Krzysztof Iniewski, CRC Press (Taylor & Francis Group),
2012.
3. J. Das, S. M. Alam and S. Bhanja, “Non-volatile Logic-in-Memory
Architecture: An Integration between Nanomagnetic Logic and Magneto-resistive
RAM” in “Nanoelectronic Device Applications Handbook”, edited by James Morris
& Krzysztof Iniewski, CRC Press (Taylor & Francis Group), 2012.
4. S. Bhanja, M. Ottavi, S. Pontarelli and F. Lombardi, “QCA
Circuits for Robust Coplanar Crossing”, in “Test, Defect Tolerance and Reliability
for Emerging Nanotechnologies”, edited by Mohammad Tehranipoor, Springer
Science +Business Media, LLC, 2008.
5. S. Bhanja and N. Ranganathan, “Hardware Implementation of Data
Compression”, in“Lossless Compression Handbook,” edited by K. Saud, Computer
Society Press, 2002
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