Education-related Publications (Journal and Conference)

1.      A. Hoque, W. Sutton, K. A. Roxy and S. Bhanja, "Integrating emerging memory technologies into undergraduate logic design course: The impact of context based teaching," 2017 IEEE International Conference on Microelectronic Systems Education (MSE), Lake Louise, AB, 2017, pp. 31-34.

2.      J. Das, and S. Bhanja, “A Novel Knowledge Module to Integrate Threshold Logic and Post-CMOS Technology into Undergraduate Logic Design Classroom" in IEEE Interdisciplinary Engineering Education Conference (IEDEC), pp. 24-30, March 2014.

3.      C. Siyambalapitiya, R. Hyde, K. Kusmierek  and S.Bhanja, “Effectiveness of Knowledge Module on “Intel 45 nm Transistor and High-k Dielectric”
into Undergraduate Semiconductor Devices Course”, in IEEE 2^nd Interdisciplinary Engineering Design Education Conference (IEDEC),  pp. 83 – 87, 2011.

4.       D. Karunaratne, S. Rajaram, P. De, K. Kusmierek  and S. Bhanja, “Novel knowledge module on fusion of logic and memory to undergraduate students”, in IEEE Microelectronic System Education Conference, pp. 64-67, 2011.

5.        J. Pulecio, A. Pulecio, M. Westlake and S. Bhanja, “A Snapshot of Young America’s Perspective towards STEM”, in IEEE Frontiers in Education (FIE),  pp. S2E-1 – S2E-2, 2010.

6.        K. Lingasubramanian and S. Bhanja, " Work In Progress - An Education Module on Engineering Ethics Concentrating on Environment-Friendly Engineering for Computer Engineers", in IEEE Frontiers in Education (FIE),  pp.  903-904, 2009.

7.        A. Kumari and S. Bhanja, "CNT logic knowledge module integrated in digital CMOS logic design", in IEEE Microelectronics Semiconductor Education,  pp. 115-117, 2009.

8.        S. Srivastava and S. Bhanja, “Integrating Nano-logic Knowledge Module into an Undergraduate Logic Design Course”, in IEEE Transactions on Education, vol. 51(3), pp. 349-355, 2008.

9.        S. Srivastava and S. Bhanja, “WIP- Introduction of K-map based Nano-logic Synthesis in Logic Design Course”, in 37^th ASEE/IEEE Frontiers in Education (FIE), pp. S1C, 2007.

10.     S. Srivastava and S. Bhanja, "Knowledge Module for Logic Design to Introduce Majority Logic Synthesis Using Karnaugh Maps", in IEEE/ACM Intl. Conference on Microelectronic Systems Education (MSE), pp. 55-56, 2007.

11.     S. Bhanja, “WIP: Enhancing Performance using Dominant Sensory Mode in Co-opeartive Learning Environment for VLSI Design Courses”, IEEE Frontiers in  Education (FIE), pp. 14-15, October, 2007.